Channels: a big structure residing in VRAM
It's specified by its physical address and always uses non-paged accesses. The channel contains:
- RAMFC [on original NV50 only] at 0
- grctx pointer
- page tables
- page directory which points to page tables
TODO: get their offsets from code and put them here.
Now, for PFIFO and PGRAPH, the relevant channel is of course the one executing.
For BAR accesses, a fake channel is used, and its address is put in one of the 170X registers, don't remember which one.
Page table
Page tables are two-level: each page table covers 512MB area of virtual space, and the virtual space is 40-bit.
DMA objects
There are three known kinds: VRAM, system RAM and virtual.
All of them are linear (unlike pre-nv50): recorded as base + limit.
Many things use the DMA objects... actual DMA objects with RAMHT handles are only one case.
In particular, grctx is specified by a DMA object, and the BARs are DMA objects to: their addresses are poked into another two of the 170X regs.
So if you set up the fake channel for BARs, set up its page tables, set up two DMA objects pointing at virtual space, and bind all three of them to 170X regs, then your BAR accessed suddenly become paged.
"Instance addresses"
Instance addresses are either linear VRAM addresses from the start of VRAM. Remember that the start of VRAM is *not* necessarily, and usually isn't, the FB BAR, or linear VRAM address for the "channel ramin object", which starts with the FIFO context on the original nv50 and is at (rd32(fifoctx + 0x98) << 12) on later cards.
Credit: Marcin Kościelnicki
The author of this entry wishes to express explicit and sincere thanks to him.